An 8k FLASH, 512 bytes EEPROM, 512 bytes SRAM CPU operating 1:1 with the external world unlike those Microchip PIC’s we love to write up about .
It’s a 350 nanometer (nm), 3 metal layer device fabricated in aÂ CMOS process.Â It’s beautiful to say the least;Â We’ve torn it down and thought we’d blog about it!
[Note:Â Clicking on pictures will give you a large ~13 MB file]
The process Atmel uses on their .35 micrometer (um) technology is awesome.Â The picture above is 200x magnified of the die (aka the substrate).
Using a little HydroFluoric Acid (HF) and we partially removed the top metal layer (M3).Â Everything is now clearly visible for our analysis.
After delaying earlier above, weÂ can nowÂ recognize features that were otherwise hidden such as the Static RAM (SRAM) and the 32 working registers.
As we mentioned earlier, we used the word, “awesome” because check this out-Â It’s so beautifully layed out that we can etch off just enough of the top metal layer to leave it’s residue so it’s still visible depending on the focal point of the microscope!Â This is very important.Â See the pictures below to better understand.
The pictures above and below are the same pictures with the exception that the lower picture has M3 removed but the trough in the SIO2 remains (e.g. the layer has not been completely etched off).Â
Can you see why we said Atmel’s process is awesome?Â We removed obscuring metal but can still see where it went (woot!).
The two photos above contain two of the 30+ configuration fuses present however it makes a person wonder why did Atmel cover the floating gate of the upper fuse with a plate of metal (remember the microchip article with the plates over the floating gates?)
Â We highlighted a track per fuse in the above photos.Â What do you think these red tracks might represent?